Summary of Specifications
|Operation Temperature||-55 ℃ ~ +125 ℃|
|Rated Voltage||50Vdc to 8KVdc|
|Temperatue Coefficent||NP0 : ≤ ± 30ppm/ °C ,
-55 ~ +125 °C (EIA Class I)
|X7R: ≤ ± 15% ,
-55 ~ +125 °C (EIA Class II )
|Capacitance Range||NP0 : 68pF - 220nF , X7R: 1000pF - 18uF|
|Dissipation Factor||X7R, X5R, X6S, X7S : 15% max|
|Insulation Resistance||10GΩ or 500/CΩ, whichever is smaller (C in Farad )|
|Aging||NP0: 0% ,
X7R: 2.5 % per decade of time
|Dielectric Strength||V ≤ 500V : 200% Rated Voltage|
|500V ≤ V < 1000V : 150% Rated Voltage|
|V ≥1000V : 120% Rated Voltage|
How To Order
- All values are capacitance EIA codes.
- Other dimensions, capacitance values, and voltages rating are available. Please contact Holy Stone
Soldering And Handling Precautions:
large ceramic capacitors are more prone to thermal and mechanical cracks. To minimize mechanical cracks, capacitors have to be handled
carefully in the original waffle pack container, carrier tape or other suitable container. Care must be taken that these capacitors do not come into contact with each other which can cause chip outs, cracks or other mechanical damage.
The recommended method for soldering large chips is reflow soldering. Wave soldering and manual soldering with Iron is not recommended.
Ceramic capacitors must be preheated with less than 2°C/second rate to about 50°C below the reflow temperature. Any sudden increase or
decrease In temperature more than the recommended rate, during soldering, may cause Internal thermal craclcks.
- Holy Stone offers polymer termination (Super Term) for very large chips to minimize mechanical cracks due to board flexing.
- To minimize the potential for surface arcing in higher voltage applications, IHHEC offers the option of a proprietary surface coating.